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clk: rockchip: fix up the clock controller for rk3328
authorElaine Zhang <zhangqing@rock-chips.com>
Thu, 5 Jan 2017 06:40:48 +0000 (14:40 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 6 Jan 2017 02:50:11 +0000 (10:50 +0800)
commitec7c587fe9f4787570cfda7bc62479fbe1243b9f
tree8edf4487089516bb972c34a80a3a89adb9399978tree | snapshot
parent0536f308d8a988615ce2a1ae0e845deda13882b2commit | diff
clk: rockchip: fix up the clock controller for rk3328

According to Heiko's advice,fix up some code style,
reference the other clock drivers for indentation.
remove grf clk init and use muxgrf to describe.
fix up the pll parent only xin24m.
fix up these *_sample error description.
add mac2io and mac2phy clk id.
moving the clock-ids a bit more together.

Change-Id: I96273a6bf808841d0488dd9db461efdffc82a99f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
drivers/clk/rockchip/clk-rk3328.c diff | blob | history
drivers/clk/rockchip/clk.h diff | blob | history
include/dt-bindings/clock/rk3328-cru.h diff | blob | history
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