PCI: tegra: Make sure the PCIe PLL is really reset
authorEric Yuen <eyuen@nvidia.com>
Tue, 26 Aug 2014 15:11:37 +0000 (17:11 +0200)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 16 Sep 2014 22:55:33 +0000 (16:55 -0600)
commitec73276204f06b6446a9c9b70173a1c15f6de536
treee662f3fd15fe8b9f98e7cbcde7e6bc4227a44823
parent8d41794c6fc61ac2f09b5c25267e2c68748326cc
PCI: tegra: Make sure the PCIe PLL is really reset

Depending on the prior state of the controller, the PLL reset may not be
pulsed.  Clear the register bit and set it after a small delay to ensure
that the PLL is really reset.

Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Eric Yuen <eyuen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/host/pci-tegra.c