[X86] Improved tablegen patters for matching TZCNT/LZCNT.
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Mon, 8 Dec 2014 17:47:18 +0000 (17:47 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Mon, 8 Dec 2014 17:47:18 +0000 (17:47 +0000)
commiteafdf26d89df42cf6ba1286519cb9bed19d5ad18
treeae6f3b37183a5e24caa4ec3ef70748b01fca0eae
parentcf2daa36712e688e76fe0d746e082551edccc1d3
[X86] Improved tablegen patters for matching TZCNT/LZCNT.

Teach ISel how to match a TZCNT/LZCNT from a conditional move if the
condition code is X86_COND_NE.
Existing tablegen patterns only allowed to match TZCNT/LZCNT from a
X86cond with condition code equal to X86_COND_E. To avoid introducing
extra rules, I added an 'ImmLeaf' definition that checks if the
condition code is COND_E or COND_NE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223668 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrInfo.td
test/CodeGen/X86/lzcnt-tzcnt.ll