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clk: samsung: exynos4: Add divider clock id for memory bus frequency
authorChanwoo Choi <cw00.choi@samsung.com>
Thu, 15 Jan 2015 01:50:52 +0000 (10:50 +0900)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Wed, 28 Jan 2015 14:51:17 +0000 (15:51 +0100)
commite64fb42da4c6c713cfc7cad607e97e0773fa41ff
tree290f1207fd8549047ebea3ff56393f704c6a964btree | snapshot
parent01e5200d169a442651f823e4941ca61d78ec2b8dcommit | diff
clk: samsung: exynos4: Add divider clock id for memory bus frequency

This patch adds the divider clock id for Exynos4 memory bus frequency.
The clock id is used for DVFS (Dynamic Voltage/Frequency Scaling)
feature of the exynos memory bus.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/clk/samsung/clk-exynos4.c diff | blob | history
include/dt-bindings/clock/exynos4.h diff | blob | history
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