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(parent: d4b64f7) | patch
AVX-512: store <4 x i1> and <2 x i1> values in memory
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 2 Sep 2015 09:20:58 +0000 (09:20 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 2 Sep 2015 09:20:58 +0000 (09:20 +0000)
commite1bb461f27841bc051cfadd13a9c1ce2fdc98b0e
tree20d816365d81bb793c15971d389c2d8519757ee8tree | snapshot
parentd4b64f7e6623c1f6d8141ec7c13d8557d965daa1commit | diff
AVX-512: store <4 x i1> and <2 x i1> values in memory
Enabled DAG pattern lowering for SKX with DQI predicate.

Differential Revision: http://reviews.llvm.org/D12550

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246625 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td diff | blob | history
test/CodeGen/X86/avx512-mask-op.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors