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clk: rockchip: rk3399: move VOP clock to other PLLs
authorXing Zheng <zhengxing@rock-chips.com>
Fri, 1 Apr 2016 08:24:26 +0000 (16:24 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Fri, 8 Apr 2016 01:26:18 +0000 (09:26 +0800)
commitdf7f5fe7d4d1ed4af7c91083b27243cc85a43b04
tree185651fb438486928dbe0186c60031b28599df2atree | snapshot
parent3f2d0cb56fc55a6423b824dabc3709132f57498ccommit | diff
clk: rockchip: rk3399: move VOP clock to other PLLs

We hope to be able to HDMI/DP can obtain better signal quality,
therefore, we move VOP pwm and aclk clocks to other PLLs, let
HDMI/DP phyclock can monopolize VPLL.

Change-Id: Ib715f9d29c0743d113f9f74886ff3921c9e0a327
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
drivers/clk/rockchip/clk-rk3399.c diff | blob | history
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