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(parent: eb1c51f) | patch
[FastISel][AArch64] Make use of the zero register when possible.
authorJuergen Ributzka <juergen@apple.com>
Wed, 13 Aug 2014 22:13:14 +0000 (22:13 +0000)
committerJuergen Ributzka <juergen@apple.com>
Wed, 13 Aug 2014 22:13:14 +0000 (22:13 +0000)
commitdc408e806928e534d2925b06f638c4e381403f56
tree7e61a46419c19c5c71956e3acdb6c975cea3bbf1tree | snapshot
parenteb1c51f8b393b2377f886502a35d2665770f7363commit | diff
[FastISel][AArch64] Make use of the zero register when possible.

This change materializes now the value "0" from the zero register.
The zero register can be folded by several instruction, so no
materialization is need at all.

Fixes <rdar://problem/17924413>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215591 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64FastISel.cpp diff | blob | history
test/CodeGen/AArch64/arm64-fast-isel-call.ll diff | blob | history
test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll diff | blob | history
test/CodeGen/AArch64/arm64-fast-isel-store.ll [new file with mode: 0644] blob
test/CodeGen/AArch64/arm64-fast-isel.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors