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(parent: b326c12) | patch
MIR Serialization: Serialize instruction's register ties.
authorAlex Lorenz <arphaman@gmail.com>
Wed, 19 Aug 2015 19:05:34 +0000 (19:05 +0000)
committerAlex Lorenz <arphaman@gmail.com>
Wed, 19 Aug 2015 19:05:34 +0000 (19:05 +0000)
commitdab6ae00968c05e56d480589a77a048d3d03c52d
treeaeba922b783c9471bd8be234b833e4d47f7c4268tree | snapshot
parentb326c1268ce25ef0e1d9e780d2977b35e3f39bdfcommit | diff
MIR Serialization: Serialize instruction's register ties.

This commit serializes the machine instruction's register operand ties.
The ties are printed out only when the instructon has register ties that are
different from the ties that are specified in the instruction's description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245482 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/MIRParser/MILexer.cpp diff | blob | history
lib/CodeGen/MIRParser/MILexer.h diff | blob | history
lib/CodeGen/MIRParser/MIParser.cpp diff | blob | history
lib/CodeGen/MIRPrinter.cpp diff | blob | history
test/CodeGen/MIR/X86/def-register-already-tied-error.mir [new file with mode: 0644] blob
test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir [new file with mode: 0644] blob
test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir [new file with mode: 0644] blob
test/CodeGen/MIR/X86/inline-asm-registers.mir diff | blob | history
test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir [new file with mode: 0644] blob
test/CodeGen/MIR/X86/tied-def-operand-invalid.mir [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors