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(parent: 0e93fa9) | patch
[ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD with swapped...
authorJiangning Liu <jiangning.liu@arm.com>
Fri, 23 May 2014 02:54:50 +0000 (02:54 +0000)
committerJiangning Liu <jiangning.liu@arm.com>
Fri, 23 May 2014 02:54:50 +0000 (02:54 +0000)
commitd7689b6ff6faa91f8c27b632a9e51ea55d638644
tree870756a93e1ae28c81940467082765ecfbcde5f4tree | snapshot
parent0e93fa9d16b44dd93fbb7f40715ad344812185b0commit | diff
[ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD with swapped input vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209495 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM64/ARM64ISelLowering.cpp diff | blob | history
test/CodeGen/ARM64/vext_reverse.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors