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(parent: bc04f3c) | patch
[X86] Add ISel patterns to select 'f32_to_f16' and 'f16_to_f32' dag nodes.
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Thu, 3 Jul 2014 21:51:06 +0000 (21:51 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Thu, 3 Jul 2014 21:51:06 +0000 (21:51 +0000)
commitd4167d0b29a8c7f2d1ee8e803b40b30e1fa7751c
tree0d10d7a885554c94d61a9cb8c43d7d9b0968dc21tree | snapshot
parentbc04f3c793c44b2f8cbac211b053b6e2d268009acommit | diff
[X86] Add ISel patterns to select 'f32_to_f16' and 'f16_to_f32' dag nodes.

This patch adds tablegen patterns to select F16C float-to-half-float
conversion instructions from 'f32_to_f16' and 'f16_to_f32' dag nodes.

If the target doesn't have F16C, then 'f32_to_f16' and 'f16_to_f32'
are expanded into library calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212293 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
lib/Target/X86/X86InstrSSE.td diff | blob | history
test/CodeGen/X86/cvt16.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors