spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT
authorJane Wan <Jane.Wan@gainspeed.com>
Wed, 16 Apr 2014 20:09:39 +0000 (13:09 -0700)
committerMark Brown <broonie@linaro.org>
Wed, 16 Apr 2014 21:04:07 +0000 (22:04 +0100)
commitd0fb47a5237d8b9576113568bacfd27892308b62
treec47f7624dd288d6f21124ecaae401cd228d27736
parentc9eaa447e77efe77b7fa4c953bd62de8297fd6c5
spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT

Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers
(n=0,1,2,3) configurable through device tree.

CSnBEF is the chip select setup time.  It's the delay in bits from the
activation of chip select pin to the first clock for data frame.

CSnAFT is the chip select hold time.  It's the delay in bits from the
last clock for data frame to the deactivation of chip select pin.

The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0.  Need to set
them to a different value for some device.

Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Documentation/devicetree/bindings/spi/fsl-spi.txt
drivers/spi/spi-fsl-espi.c