Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
authorJakob Stoklund Olesen <stoklund@2pi.dk>
Mon, 10 Jan 2011 02:58:51 +0000 (02:58 +0000)
committerJakob Stoklund Olesen <stoklund@2pi.dk>
Mon, 10 Jan 2011 02:58:51 +0000 (02:58 +0000)
commitc9df025e33ac435adb3b3318d237c36ca7cec659
tree80a9dfcbb33fcfa3fbfdff2b2f9e6ba80ed170fc
parentfdc8f2d2604877d80f64e309d4b03ea67addf037
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.

These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
20 files changed:
include/llvm/CodeGen/MachineRegisterInfo.h
lib/CodeGen/AllocationOrder.cpp
lib/CodeGen/DeadMachineInstructionElim.cpp
lib/CodeGen/LiveDebugVariables.cpp
lib/CodeGen/LiveIntervalAnalysis.cpp
lib/CodeGen/MachineCSE.cpp
lib/CodeGen/MachineInstr.cpp
lib/CodeGen/MachineLICM.cpp
lib/CodeGen/PeepholeOptimizer.cpp
lib/CodeGen/RegAllocFast.cpp
lib/CodeGen/RegAllocLinearScan.cpp
lib/CodeGen/SelectionDAG/InstrEmitter.cpp
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
lib/CodeGen/TailDuplication.cpp
lib/CodeGen/TwoAddressInstructionPass.cpp
lib/CodeGen/VirtRegMap.cpp
lib/Target/ARM/ARMBaseInstrInfo.cpp
lib/Target/ARM/ARMBaseRegisterInfo.cpp
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/X86/X86ISelLowering.cpp