FROMLIST: drm: bridge: dw-hdmi: Fix the PHY power up sequence
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Sun, 5 Mar 2017 23:35:57 +0000 (01:35 +0200)
committerZheng Yang <zhengyang@rock-chips.com>
Fri, 28 Apr 2017 08:20:37 +0000 (16:20 +0800)
commitc40684128d7036fc854341535334a8496053bc68
treea9fbaf21fbf978e76a1b9ecac7881ccf72c4cbc3
parent550239d83c2e5066d05e7f8c99db09012fad387c
FROMLIST: drm: bridge: dw-hdmi: Fix the PHY power up sequence

When powering the PHY up we need to wait for the PLL to lock. This is
done by polling the TX_PHY_LOCK bit in the HDMI_PHY_STAT0 register
(interrupt-based wait could be implemented as well but is likely
overkill). The bit is asserted when the PLL locks, but the current code
incorrectly waits for the bit to be deasserted. Fix it, and while at it,
replace the udelay() with a sleep as the code never runs in
non-sleepable context.

To be consistent with the power down implementation move the poll loop
to the power off function.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170305233557.11945-1-laurent.pinchart+renesas@ideasonboard.com
Change-Id: Ibdbb87b7474a6137698692480f11ee61cd429f8e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9604815/)
drivers/gpu/drm/bridge/dw-hdmi.c