Removed tabs everywhere except autogenerated & external files. Add make
authorAnton Korobeynikov <asl@math.spbu.ru>
Mon, 16 Apr 2007 18:10:23 +0000 (18:10 +0000)
committerAnton Korobeynikov <asl@math.spbu.ru>
Mon, 16 Apr 2007 18:10:23 +0000 (18:10 +0000)
commitbed2946a96ecb15b0b636fa74cb26ce61b1c648e
tree52a39df658d308bd7dfb4f04479139d23c149c73
parent892299ccf41e9b3726b1a9f297e47ce636b197ca
Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
41 files changed:
Makefile.rules
include/llvm/ADT/BitVector.h
include/llvm/ADT/hash_set.in
include/llvm/Analysis/LoopPass.h
include/llvm/CallGraphSCCPass.h
include/llvm/Pass.h
include/llvm/PassSupport.h
include/llvm/Support/Dwarf.h
include/llvm/Support/MathExtras.h
include/llvm/Target/TargetLowering.h
lib/Analysis/IPA/CallGraphSCCPass.cpp
lib/CodeGen/MachOWriter.h
lib/CodeGen/README.txt
lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
lib/CodeGen/SelectionDAG/TargetLowering.cpp
lib/Target/ARM/ARMInstrInfo.cpp
lib/Target/ARM/ARMRegisterInfo.cpp
lib/Target/Alpha/AlphaAsmPrinter.cpp
lib/Target/Alpha/AlphaISelDAGToDAG.cpp
lib/Target/Alpha/AlphaISelLowering.cpp
lib/Target/Alpha/AlphaLLRP.cpp
lib/Target/Alpha/AlphaRegisterInfo.cpp
lib/Target/IA64/IA64Bundling.cpp
lib/Target/IA64/IA64ISelDAGToDAG.cpp
lib/Target/IA64/IA64ISelLowering.cpp
lib/Target/MSIL/MSILWriter.cpp
lib/Target/MSIL/MSILWriter.h
lib/Target/X86/X86CodeEmitter.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Transforms/IPO/IndMemRemoval.cpp
lib/Transforms/IPO/Internalize.cpp
lib/Transforms/Instrumentation/RSProfiling.cpp
lib/Transforms/Scalar/LowerPacked.cpp
lib/Transforms/Scalar/Reg2Mem.cpp
lib/Transforms/Utils/CodeExtractor.cpp
lib/Transforms/Utils/LowerAllocations.cpp
lib/Transforms/Utils/LowerInvoke.cpp
lib/Transforms/Utils/LowerSelect.cpp
lib/Transforms/Utils/LowerSwitch.cpp
lib/Transforms/Utils/Mem2Reg.cpp
lib/VMCore/PassManager.cpp