Do not consider a machine instruction that uses and defines the same
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 13 Nov 2012 18:40:58 +0000 (18:40 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 13 Nov 2012 18:40:58 +0000 (18:40 +0000)
commitb64e2115de3b293ef706b75f040277477c949208
tree02290b789956eaf291cce86fad38cc7c22df9aa5
parent206252cc9f5509b27aa0761c677fdee8daff001c
Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.

This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167855 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/MachineCSE.cpp
test/CodeGen/PowerPC/2012-10-11-dynalloc.ll [new file with mode: 0644]