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(parent: a2d6025) | patch
add basic encoding support for immediates and registers, allowing us
authorChris Lattner <sabre@nondot.org>
Mon, 15 Nov 2010 04:51:55 +0000 (04:51 +0000)
committerChris Lattner <sabre@nondot.org>
Mon, 15 Nov 2010 04:51:55 +0000 (04:51 +0000)
commita04084e777db923faea0d2c93ce667054fdf576f
tree5fcc5f1ee07850756eb091fe7e03a947978e45aetree | snapshot
parenta2d602529d4ddde934bde14b43d15a0d009f76d3commit | diff
add basic encoding support for immediates and registers, allowing us
to encode all of these instructions correctly (for example):

        mflr r0                         ; encoding: [0x7c,0x08,0x02,0xa6]
        stw r0, 8(r1)                   ; encoding: [0x90,0x01,0x00,0x08]
        stwu r1, -64(r1)                ; encoding: [0x94,0x21,0xff,0xc0]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119118 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrInfo.td diff | blob | history
lib/Target/PowerPC/PPCMCCodeEmitter.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors