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(parent: fea51fc) | patch
Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>
Sat, 28 May 2011 04:07:29 +0000 (04:07 +0000)
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>
Sat, 28 May 2011 04:07:29 +0000 (04:07 +0000)
commita0112d0c39aa31fe555ecf7296923ca30f68f811
tree6b0172862586c64805ec0dcae66c7a08ca8ee264tree | snapshot
parentfea51fc007598176d48fb7319a9bf471efb93127commit | diff
Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132248 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/IntrinsicsARM.td diff | blob | history
lib/Target/ARM/ARMISelDAGToDAG.cpp diff | blob | history
lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
lib/Target/ARM/ARMInstrInfo.td diff | blob | history
lib/Target/ARM/ARMInstrThumb2.td diff | blob | history
test/CodeGen/ARM/ldstrexd.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors