This patch corrects logic in PPCFrameLowering for save and restore of

This patch corrects logic in PPCFrameLowering for save and restore of
nonvolatile condition register fields across calls under the SVR4 ABIs.

 * With the 64-bit ABI, the save location is at a fixed offset of 8 from
the stack pointer.  The frame pointer cannot be used to access this
portion of the stack frame since the distance from the frame pointer may
change with alloca calls.

 * With the 32-bit ABI, the save location is just below the general
register save area, and is accessed via the frame pointer like the rest
of the save areas.  This is an optional slot, so it must only be created
if any of CR2, CR3, and CR4 were modified.

 * For both ABIs, save/restore logic is generated only if one of the
nonvolatile CR fields were modified.

I also took this opportunity to clean up an extra FIXME in
PPCFrameLowering.h.  Save area offsets for 32-bit GPRs are meaningless
for the 64-bit ABI, so I removed them for correctness and efficiency.

Fixes PR13708 and partially also PR13623. It lets us enable exception handling
on PPC64.

Patch by William J. Schmidt!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163713 91177308-0d34-0410-b5e6-96231b3b80d8