drm/i915: Fix chv cdclk support
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 2 Mar 2015 18:07:17 +0000 (20:07 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Mar 2015 21:30:10 +0000 (22:30 +0100)
commit9d0d3fdaae08e9221070dda32348116c2a3235ed
tree4786e314f39b7bdab21788094bb1dd2fb1f665f1
parent6cca31950a5df57d89d9cb4f846c96dab902adf9
drm/i915: Fix chv cdclk support

The specs seem to be full of misinformation wrt. the Punit register
0x36. Some versions still show the old VLV bit layout, some the new
layout, and all of them seem to tell us nonsense about the cdclk
value encoding.

Testing on actual hardware has shown that we simply need to program
the desired CCK divider into the Punit register using the new layout of
the bits. Doing that, the status bit change to indicate the same value,
and the CCK 0x6b register also changes accordingly to indicate that CCK
is now using the new divider.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Vijay Purushothaman <vijay.a.purushothaman@linux.intel.com>
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c