[SystemZ] Optimize sign-extends of vector setccs
authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>
Fri, 12 Jul 2013 09:17:10 +0000 (09:17 +0000)
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>
Fri, 12 Jul 2013 09:17:10 +0000 (09:17 +0000)
commit9bcad42c3aadab118b6ed5f30f2ea0d87228fd3f
treecd0355356c13a1e429b7606f35dfa9851f90899c
parent5e009541973b7935386055066689902aa7134e2d
[SystemZ] Optimize sign-extends of vector setccs

Normal (sext (setcc ...)) sequences are optimised into
(select_cc ..., -1, 0) by DAGCombiner::visitSIGN_EXTEND.
However, this is deliberately not done for vectors, and after
vector type legalization we have (sext_inreg (setcc ...)) instead.

I wondered about trying to extend DAGCombiner to handle this case too,
but it seemed to be a loss on some other targets I tried, even those for
which SETCC isn't "legal" and SELECT_CC is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186149 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/SystemZ/SystemZInstrInfo.td
test/CodeGen/SystemZ/branch-07.ll