[mips] Fix MipsAsmParser::parseCCRRegs.
authorAkira Hatanaka <ahatanaka@mips.com>
Mon, 22 Jul 2013 19:30:38 +0000 (19:30 +0000)
committerAkira Hatanaka <ahatanaka@mips.com>
Mon, 22 Jul 2013 19:30:38 +0000 (19:30 +0000)
commit9a05b98ef9ec58c52f35ce04677f24ef62a79701
treebb57781a57ff97c48da73b224b5e0edd4c7f9e9b
parent30115ec7a3e35038554d4131f3c515744cbdd933
[mips] Fix MipsAsmParser::parseCCRRegs.

Enable parsing all 32 floating point control registers $0-31 and stop trying to
parse floating point condition code register $fcc0. Also, return ParseFail if
the operand being parsed is not in the expected format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186861 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
test/MC/Mips/mips-fpu-instructions.s