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(parent: 52346e9) | patch
Add code in MipsDAGToDAGISel for selecting constant +0.0.
authorAkira Hatanaka <ahatanaka@mips.com>
Tue, 20 Dec 2011 22:25:50 +0000 (22:25 +0000)
committerAkira Hatanaka <ahatanaka@mips.com>
Tue, 20 Dec 2011 22:25:50 +0000 (22:25 +0000)
commit990d639f552308220dae062661fa3ba074d7150c
treec853dd48c43251ae391da17e542170bf25ea7154tree | snapshot
parent52346e964ff1108729c2b8990b859c10f09a1822commit | diff
Add code in MipsDAGToDAGISel for selecting constant +0.0.
MIPS64 can generate constant +0.0 with a single DMTC1 instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146999 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsISelDAGToDAG.cpp diff | blob | history
test/CodeGen/Mips/mips64fpimm0.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors