[InstCombine][X86] Teach how to fold calls to SSE2/AVX2 packed logical shift
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Sat, 26 Apr 2014 01:03:22 +0000 (01:03 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Sat, 26 Apr 2014 01:03:22 +0000 (01:03 +0000)
commit96db9b8ed87e502801e3dda7d13896acd17d8128
treeac2e58413693d984ca219b617bf84947bb5f008b
parentf3a9eb107c079a407962b34ebe5232a41dbf8146
[InstCombine][X86] Teach how to fold calls to SSE2/AVX2 packed logical shift
right intrinsics.

A packed logical shift right with a shift count bigger than or equal to the
element size always produces a zero vector. In all other cases, it can be
safely replaced by a 'lshr' instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207299 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Transforms/InstCombine/InstCombineCalls.cpp
test/Transforms/InstCombine/vec_demanded_elts.ll