Add a RegList (register list) object to ARMOperand. It will be used soon to hold
authorBill Wendling <isanbard@gmail.com>
Sat, 6 Nov 2010 19:56:04 +0000 (19:56 +0000)
committerBill Wendling <isanbard@gmail.com>
Sat, 6 Nov 2010 19:56:04 +0000 (19:56 +0000)
commit8d5acb7007decaf0c30bf4a3d4c55e5cc2cce0a7
tree6cd1843fd1373f4a178f757fade8ae6f43da13ea
parent98c870f87b7f0c996a9ba67003d88d434d6dbcd0
Add a RegList (register list) object to ARMOperand. It will be used soon to hold
(surprise!) a list of registers. Register lists are consecutive, so we only need
to record the start register plus the number of registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118351 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/AsmParser/ARMAsmParser.cpp