Implement a DAGCombine in MipsISelLowering.cpp which transforms the following
authorAkira Hatanaka <ahatanaka@mips.com>
Wed, 13 Jun 2012 20:33:18 +0000 (20:33 +0000)
committerAkira Hatanaka <ahatanaka@mips.com>
Wed, 13 Jun 2012 20:33:18 +0000 (20:33 +0000)
commit8782707f5074ab3951eb6424394bc8d2a2fa584a
treeee883b378ee78e6092120edb704593ce17bc1107
parente193b325837bee5f9a848a16077a6e156fe88fba
Implement a DAGCombine in MipsISelLowering.cpp which transforms the following
pattern:

(add v0, (add v1, abs_lo(tjt))) => (add (add v0, v1), abs_lo(tjt))

"tjt" is a TargetJumpTable node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158419 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsISelDAGToDAG.cpp
lib/Target/Mips/MipsISelLowering.cpp
test/CodeGen/Mips/2010-07-20-Switch.ll