R600/SI: Change formatting of printed registers.
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 12 Nov 2013 02:35:51 +0000 (02:35 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 12 Nov 2013 02:35:51 +0000 (02:35 +0000)
commit86245071b52f1da99ac65157c38bfa5577a80714
tree4bd0a466a4ba45e90f29e208c4d716cc0ab8fdaa
parentc6d4d667a8a56b341fac949153ec5939857445df
R600/SI: Change formatting of printed registers.

Print the range of registers used with a single letter prefix.
This better matches what the shader compiler produces and
is overall less obnoxious than concatenating all of the
subregister names together.

Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1,
it will print s[0:1] and so on.

There doesn't appear to be a straightforward way
to get the actual register info in the InstPrinter,
so this parses the generated name to print with the
new syntax.

The required test changes are pretty nasty, and register
matching regexes are now worse. Since there isn't a way to
add to a variable in FileCheck, some of the tests now don't
check the exact number of registers used, but I don't think that
will be a real problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194443 91177308-0d34-0410-b5e6-96231b3b80d8
55 files changed:
lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h
test/CodeGen/R600/32-bit-local-address-space.ll
test/CodeGen/R600/64bit-kernel-args.ll
test/CodeGen/R600/add.ll
test/CodeGen/R600/address-space.ll
test/CodeGen/R600/and.ll
test/CodeGen/R600/bfi_int.ll
test/CodeGen/R600/build_vector.ll
test/CodeGen/R600/fabs.ll
test/CodeGen/R600/fadd64.ll
test/CodeGen/R600/fcmp64.ll
test/CodeGen/R600/fconst64.ll
test/CodeGen/R600/fdiv64.ll
test/CodeGen/R600/fma.ll
test/CodeGen/R600/fmul64.ll
test/CodeGen/R600/fmuladd.ll
test/CodeGen/R600/fneg.ll
test/CodeGen/R600/fsqrt.ll
test/CodeGen/R600/fsub64.ll
test/CodeGen/R600/imm.ll
test/CodeGen/R600/indirect-addressing-si.ll
test/CodeGen/R600/kernel-args.ll
test/CodeGen/R600/llvm.SI.imageload.ll
test/CodeGen/R600/llvm.SI.resinfo.ll
test/CodeGen/R600/llvm.SI.sample-masked.ll
test/CodeGen/R600/llvm.SI.sample.ll
test/CodeGen/R600/llvm.SI.sampled.ll
test/CodeGen/R600/llvm.SI.tbuffer.store.ll
test/CodeGen/R600/load.ll
test/CodeGen/R600/load.vec.ll
test/CodeGen/R600/load64.ll
test/CodeGen/R600/local-memory-two-objects.ll
test/CodeGen/R600/local-memory.ll
test/CodeGen/R600/lshl.ll
test/CodeGen/R600/lshr.ll
test/CodeGen/R600/mad_uint24.ll
test/CodeGen/R600/mul.ll
test/CodeGen/R600/mul_uint24.ll
test/CodeGen/R600/mulhu.ll
test/CodeGen/R600/or.ll
test/CodeGen/R600/rotr.ll
test/CodeGen/R600/seto.ll
test/CodeGen/R600/setuo.ll
test/CodeGen/R600/sgpr-copy.ll
test/CodeGen/R600/shl.ll
test/CodeGen/R600/si-lod-bias.ll
test/CodeGen/R600/sra.ll
test/CodeGen/R600/srl.ll
test/CodeGen/R600/sub.ll
test/CodeGen/R600/trunc.ll
test/CodeGen/R600/unaligned-load-store.ll
test/CodeGen/R600/work-item-intrinsics.ll
test/CodeGen/R600/xor.ll
test/CodeGen/R600/zero_extend.ll