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video: rockchip: hdmi: v2: modify phy clock rate to reduce tdms clock jitter
authorxuhuicong <xhc@rock-chips.com>
Mon, 21 Mar 2016 07:44:23 +0000 (15:44 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Mon, 21 Mar 2016 12:48:03 +0000 (20:48 +0800)
commit846b7cb3a664914ee9b3d197a240ba4304c5173c
tree4b54e4665e4be5604044ad22e21bbbcab2f94e3etree | snapshot
parentcf12427db7e4087709a28c5a4ffbc76298f45d3ecommit | diff
video: rockchip: hdmi: v2: modify phy clock rate to reduce tdms clock jitter

set hdmi phy clock as 148.5Mhz when dclk rate over this frequency

Change-Id: I416b2b98fe42fafc45491b66252f245aed0f1364
Signed-off-by: xuhuicong <xhc@rock-chips.com>
drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c diff | blob | history
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