AMDGPU: Add sdst operand to VOP2b instructions
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 29 Aug 2015 07:16:50 +0000 (07:16 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 29 Aug 2015 07:16:50 +0000 (07:16 +0000)
commit820985a01bf5ea82aea152670b8bedc0436eddcd
treecb541ccc925617c732794de159490436d022597f
parentfe59e8ecf30eb328085145080d2994b665f2c090
AMDGPU: Add sdst operand to VOP2b instructions

The VOP3 encoding of these allows any SGPR pair for the i1
output, but this was forced before to always use vcc.
This doesn't yet try to use this, but does add the operand
to the definitions so the main change is adding vcc to the
output of the VOP2 encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246358 91177308-0d34-0410-b5e6-96231b3b80d8
18 files changed:
lib/Target/AMDGPU/SIInstrInfo.td
lib/Target/AMDGPU/SIInstructions.td
test/CodeGen/AMDGPU/add.ll
test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
test/CodeGen/AMDGPU/ds_read2st64.ll
test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.i32.ll
test/CodeGen/AMDGPU/local-memory-two-objects.ll
test/CodeGen/AMDGPU/operand-folding.ll
test/CodeGen/AMDGPU/scratch-buffer.ll
test/CodeGen/AMDGPU/shl_add_constant.ll
test/CodeGen/AMDGPU/shl_add_ptr.ll
test/CodeGen/AMDGPU/sub.ll
test/CodeGen/AMDGPU/udivrem.ll
test/CodeGen/AMDGPU/vop-shrink.ll
test/MC/AMDGPU/vop2-err.s
test/MC/AMDGPU/vop2.s