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(parent: 687bcb2) | patch
Handle vector move / load which zero the destination register top bits (i.e. movd...
authorEvan Cheng <evan.cheng@apple.com>
Thu, 8 May 2008 00:57:18 +0000 (00:57 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Thu, 8 May 2008 00:57:18 +0000 (00:57 +0000)
commit7e2ff77ef05c23db6b9c82bc7a4110e170d7f94c
tree64720b94bfac0d0b7c77ad7005c71036d40b1d6btree | snapshot
parent687bcb2be07f675914e3a452fcc624bed8f53351commit | diff
Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50838 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelDAGToDAG.cpp diff | blob | history
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
lib/Target/X86/X86ISelLowering.h diff | blob | history
lib/Target/X86/X86InstrMMX.td diff | blob | history
lib/Target/X86/X86InstrSSE.td diff | blob | history
test/CodeGen/X86/vec_set-5.ll diff | blob | history
test/CodeGen/X86/vec_set-6.ll diff | blob | history
test/CodeGen/X86/vec_set-C.ll [new file with mode: 0644] blob
test/CodeGen/X86/vec_set-D.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors