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[PowerPC] Support branch mnemonics with implied CR0
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Mon, 10 Jun 2013 17:19:15 +0000 (17:19 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Mon, 10 Jun 2013 17:19:15 +0000 (17:19 +0000)
commit7c6f90d486911076da01ec0f37af4760fdd7041f
tree78dbf9712290912553f10b65745619d171d7d3a9tree | snapshot
parentb838f9fe619382b212f6055ad94a74ff36db9219commit | diff
[PowerPC] Support branch mnemonics with implied CR0

The extended branch mnemonics are supposed to use an implied CR0
if there is no explicit condition register specified.  This patch
adds extra variants of the mnemonics to this effect.

Problem reported by Joerg Sonnenberger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183686 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrInfo.td diff | blob | history
test/MC/PowerPC/ppc64-encoding-ext.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors