Added special register class containing (for now) %fsr.
authorVikram S. Adve <vadve@cs.uiuc.edu>
Tue, 27 May 2003 00:02:22 +0000 (00:02 +0000)
committerVikram S. Adve <vadve@cs.uiuc.edu>
Tue, 27 May 2003 00:02:22 +0000 (00:02 +0000)
commit78a4f23a8e2c14d708899d1bd2011b64584fafa7
tree4ae33406a650cb1e4ca23480f3e805f296d5f463
parentbd4ecf769def9fff84ab27e6467e5510105caf99
Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.
Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6339 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/SparcV9/SparcV9AsmPrinter.cpp
lib/Target/SparcV9/SparcV9InstrSelection.cpp
lib/Target/SparcV9/SparcV9Internals.h
lib/Target/SparcV9/SparcV9RegClassInfo.h
lib/Target/SparcV9/SparcV9RegInfo.cpp