17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets
authorDavid Peixotto <dpeixott@codeaurora.org>
Thu, 17 Oct 2013 19:52:05 +0000 (19:52 +0000)
committerDavid Peixotto <dpeixott@codeaurora.org>
Thu, 17 Oct 2013 19:52:05 +0000 (19:52 +0000)
commit7014d274e4adb51cbb20201ab002057395b7dcaa
treeda56ea034fbb48cc40867bb0d6d0d09bf8e25de1
parent6483751a362948bb83940e55f63226c27c472bc0
17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets

This commit implements the correct lowering of the
COPY_STRUCT_BYVAL_I32 pseudo-instruction for thumb1 targets.
Previously, the lowering of COPY_STRUCT_BYVAL_I32 generated the
post-increment forms of ldr/ldrh/ldrb instructions. Thumb1 does not
have the post-increment form of these instructions so the generated
assembly contained invalid instructions.

Passing the generated assembly to gcc caused it to complain with an
error like this:

  Error: cannot honor width suffix -- `ldrb r3,[r0],#1'

and the integrated assembler would generate an object file with an
invalid instruction encoding.

This commit contains a small test case that demonstrates the problem
with thumb1 targets as well as an expanded test case that more
throughly tests the lowering of byval struct passing for arm,
thumb1, and thumb2 targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192916 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp
test/CodeGen/ARM/struct_byval_arm_t1_t2.ll [new file with mode: 0644]
test/CodeGen/Thumb/PR17309.ll [new file with mode: 0644]