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(parent: bcf1501) | patch
AArch64/ARM64: support indexed loads/stores on vector types.
authorTim Northover <tnorthover@apple.com>
Fri, 2 May 2014 14:54:15 +0000 (14:54 +0000)
committerTim Northover <tnorthover@apple.com>
Fri, 2 May 2014 14:54:15 +0000 (14:54 +0000)
commit6f86e23c1a8375cd47b586efc001330720d24f79
tree7aec56a544c13ea680e7637413bcdf5401edc096tree | snapshot
parentbcf15018398f0c9303d66f4dabdfdd9006555170commit | diff
AArch64/ARM64: support indexed loads/stores on vector types.

While post-indexed LD1/ST1 instructions do exist for vector loads,
this patch makes use of the more flexible addressing-modes in LDR/STR
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207838 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM64/ARM64AsmPrinter.cpp diff | blob | history
lib/Target/ARM64/ARM64ISelDAGToDAG.cpp diff | blob | history
lib/Target/ARM64/ARM64ISelLowering.cpp diff | blob | history
lib/Target/ARM64/ARM64InstrInfo.td diff | blob | history
test/CodeGen/ARM64/indexed-vector-ldst.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors