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(parent: c951003) | patch
Added 0x0D to 2-byte opcode extension table for prefetch* variants
authorKay Tiong Khoo <kkhoo@perfwizard.com>
Tue, 12 Feb 2013 00:19:12 +0000 (00:19 +0000)
committerKay Tiong Khoo <kkhoo@perfwizard.com>
Tue, 12 Feb 2013 00:19:12 +0000 (00:19 +0000)
commit6c3daabc3ee51a8fcb804e0f110f01e59e0e6d61
treefcab8b8339070a35ecf1fc7d2418566b66876428tree | snapshot
parentc951003faf4d475d221f5e839971673d2350b983commit | diff
Added 0x0D to 2-byte opcode extension table for prefetch* variants
Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174920 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86Instr3DNow.td diff | blob | history
utils/TableGen/X86RecognizableInstr.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors