AMDGPU: Fix adding redundant implicit operands
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 1 Sep 2015 02:02:21 +0000 (02:02 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 1 Sep 2015 02:02:21 +0000 (02:02 +0000)
commit6bf871423ec7b5dee85aaed2204fb2c984fadd6c
tree19f672968401da8b48a66bb38a4398ff2169575c
parent715dbbbc3c99f0e6830cdc25c110e96e0cf7d94c
AMDGPU: Fix adding redundant implicit operands

These are already added during the MachineInstr construction,
so this was adding the implicit registers twice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246525 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIInstrInfo.cpp