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[NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled
authorJustin Holewinski <jholewinski@nvidia.com>
Wed, 23 Jul 2014 17:40:45 +0000 (17:40 +0000)
committerJustin Holewinski <jholewinski@nvidia.com>
Wed, 23 Jul 2014 17:40:45 +0000 (17:40 +0000)
commit6b50a7d1792217abff02dc30a81aca9c0fdb8cb9
tree8750c5e65a80983ac6edc927a20def8e9dfd2959tree | snapshot
parente8d7ebcd5a430a93952cd2a527de84abd501df22commit | diff
[NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled

With optimizations disabled, we disable the isel patterns for mul.wide; but we
were still generating MULWIDE ISD nodes.  Now, we only try to generate MULWIDE
ISD nodes in DAGCombine if the optimization level is not zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213773 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/NVPTX/NVPTXISelLowering.cpp diff | blob | history
test/CodeGen/NVPTX/mulwide.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors