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MIPS: Correct MIPS16 BREAK code interpretation
authorMaciej W. Rozycki <macro@linux-mips.org>
Fri, 3 Apr 2015 22:26:21 +0000 (23:26 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 7 Apr 2015 23:09:53 +0000 (01:09 +0200)
commit68893e0051419ccdc14fd6eafcdecc96533c6cc3
tree047489f3daa3506b4bbadeb62f68bcef9fcbd023tree | snapshot
parent18a2c2c6b9319503eeac8a38b62fc82c9ff81b0dcommit | diff
MIPS: Correct MIPS16 BREAK code interpretation

Correct the interpretation of the immediate MIPS16 BREAK instruction
code embedded in the instruction word across bits 10:5 rather than 11:6
as current code implies, fixing the interpretation of integer overflow
and divide by zero traps.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9695/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/traps.c diff | blob | history
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