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(parent: 454061b) | patch
AArch64: use ldxp/stxp pair to implement 128-bit atomic loads.
authorTim Northover <tnorthover@apple.com>
Wed, 2 Dec 2015 18:12:57 +0000 (18:12 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 2 Dec 2015 18:12:57 +0000 (18:12 +0000)
commit57b1a9599b8b3a3c571103ed481932c2768d8da9
treee1b86a14e10e4591431ce62ac36a9caf82b791a9tree | snapshot
parent454061bf3aeba2ac0b7b5dadb4f07e497139609fcommit | diff
AArch64: use ldxp/stxp pair to implement 128-bit atomic loads.

The ARM ARM is clear that 128-bit loads are only guaranteed to have been atomic
if there has been a corresponding successful stxp. It's less clear for AArch32, so
I'm leaving that alone for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254524 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/TargetLowering.h diff | blob | history
lib/CodeGen/AtomicExpandPass.cpp diff | blob | history
lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
lib/Target/Hexagon/HexagonISelLowering.cpp diff | blob | history
test/CodeGen/AArch64/arm64-atomic-128.ll diff | blob | history
test/CodeGen/ARM/atomic-64bit.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors