Apply the no-r0 class to PPC TOC ADDI[S] pseudo instructions
authorHal Finkel <hfinkel@anl.gov>
Wed, 27 Mar 2013 05:57:56 +0000 (05:57 +0000)
committerHal Finkel <hfinkel@anl.gov>
Wed, 27 Mar 2013 05:57:56 +0000 (05:57 +0000)
commit56d926ac14406ef87d34fbf77632c26d8e789818
treeaaebdefa266df252f7d87a423a56adf23af1df8d
parent37ef805818e32531c2c3a454fee33f06f363f9c2
Apply the no-r0 class to PPC TOC ADDI[S] pseudo instructions

Like the addi/addis instructions themselves, these pseudo instructions also
cannot have r0 as their register parameter (because it will be interpreted as
the value 0).

This is not yet testable because we don't yet allocate r0 (and even when we do,
any regression test would be very fragile because it would depend on the
register allocator heuristics).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178118 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstr64Bit.td