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(parent: 55f43d6) | patch
[fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271%
authorChad Rosier <mcrosier@apple.com>
Thu, 22 Mar 2012 00:21:17 +0000 (00:21 +0000)
committerChad Rosier <mcrosier@apple.com>
Thu, 22 Mar 2012 00:21:17 +0000 (00:21 +0000)
commit544b9b426f0dfa1beef6dc3640607dee3ca1160e
tree72e4f0b64ca11a3a78633db46c6d1f94c61445b9tree | snapshot
parent55f43d6b7e3ad1f08f5392205ab0feabf4c9933dcommit | diff
[fast-isel] Fold "urem x, pow2" -> "and x, pow2-1".  This should fix the 271%
execution-time regression for nsieve-bits on the ARMv7 -O0 -g nightly tester.
This may also improve compile-time on architectures that would otherwise
generate a libcall for urem (e.g., ARM) or fall back to the DAG selector.
rdar://10810716

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153230 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/FastISel.cpp diff | blob | history
test/CodeGen/ARM/fast-isel.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors