Enhance the shift propagator to handle the case when you have:
authorChris Lattner <sabre@nondot.org>
Fri, 27 Aug 2010 22:53:44 +0000 (22:53 +0000)
committerChris Lattner <sabre@nondot.org>
Fri, 27 Aug 2010 22:53:44 +0000 (22:53 +0000)
commit4ece577019705e0a4d7f80f8e8fc1f3cfde276ee
tree409b539215f3192ae9c1676a89f5ffd5cbcfb8a1
parent0991dfbbe048a88c0f85618f8c9a21d11b34d69c
Enhance the shift propagator to handle the case when you have:

A = shl x, 42
...
B = lshr ..., 38

which can be transformed into:
A = shl x, 4
...

iff we can prove that the would-be-shifted-in bits
are already zero.  This eliminates two shifts in the testcase
and allows eliminate of the whole i128 chain in the real example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112314 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Transforms/InstCombine/InstCombineShifts.cpp
test/Transforms/InstCombine/shift.ll