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(parent: 6ad150b) | patch
Refine Cell's i64 constant generation code to cover more constants where the
authorScott Michel <scottm@aero.org>
Thu, 6 Mar 2008 04:02:54 +0000 (04:02 +0000)
committerScott Michel <scottm@aero.org>
Thu, 6 Mar 2008 04:02:54 +0000 (04:02 +0000)
commit4cb8bd8effdc999128d9ab82e1b2fe860b01c556
tree602ae69ba58e2f122b124d866e1aa5df7c7901e0tree | snapshot
parent6ad150baac1f3afc2d8183ea20afb2b2ee55854ccommit | diff
Refine Cell's i64 constant generation code to cover more constants where the
upper and lower 32-bits are the same (in addition to 0 and -1 previously.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47985 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/CellSPU/SPUISelLowering.cpp diff | blob | history
test/CodeGen/CellSPU/immed64.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors