Fixed the condition codes for the atomic64 min/umin code generation on ARM. If the...
authorSilviu Baranga <silviu.baranga@arm.com>
Fri, 25 Jan 2013 10:39:49 +0000 (10:39 +0000)
committerSilviu Baranga <silviu.baranga@arm.com>
Fri, 25 Jan 2013 10:39:49 +0000 (10:39 +0000)
commit4a9256f265a7fcccd1f04518b55fd751f3a920a8
treed061106e49ed71c03aac18de8a456782e9486a93
parenta3bb665c6505ff78c29a37ca95dad1d297928791
Fixed the condition codes for the atomic64 min/umin code generation on ARM. If the sutraction of the higher 32 bit parts gives a 0 result, we need to do the store operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173437 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp
test/CodeGen/ARM/atomic-64bit.ll