x86 power: define RAPL MSRs
authorLen Brown <len.brown@intel.com>
Thu, 1 Nov 2012 00:47:40 +0000 (20:47 -0400)
committerLen Brown <len.brown@intel.com>
Sat, 24 Nov 2012 02:40:11 +0000 (21:40 -0500)
commit3fc808aaa052dec7b155f3242c6c0eabf0c49127
treefd445d7caba56ae094b6ca99797bff50ad69fe59
parent9c63a650bb100e7553d60c991ba0c5db9c743239
x86 power: define RAPL MSRs

The Run Time Average Power Limiting interface
is currently model specific, present on Sandy Bridge
and Ivy Bridge processors.

These #defines correspond to documentation in the latest
"IntelĀ® 64 and IA-32 Architectures Software Developer Manual",
plus some typos in that document corrected.

Signed-off-by: Len Brown <len.brown@intel.com>
Cc: x86@kernel.org
arch/x86/include/asm/msr-index.h