R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chips
authorTom Stellard <thomas.stellard@amd.com>
Mon, 25 May 2015 16:15:54 +0000 (16:15 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Mon, 25 May 2015 16:15:54 +0000 (16:15 +0000)
commit38aad1c16a7774415b2b408154e0aa35aebc7121
treede1f34888227e7adc158487064507c436babb513
parentcbb915183e73553b0185189c5599edfd2f2e20f5
R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chips

The src and dst register cannot be the same on chips with 16 lds banks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238147 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/R600/AMDGPU.td
lib/Target/R600/AMDGPUSubtarget.cpp
lib/Target/R600/AMDGPUSubtarget.h
lib/Target/R600/Processors.td
lib/Target/R600/SIInstructions.td
test/CodeGen/R600/llvm.SI.fs.interp.ll