Add instruction encodings / disassembly support for rus instructions.
authorRichard Osborne <richard@xmos.com>
Mon, 17 Dec 2012 13:50:04 +0000 (13:50 +0000)
committerRichard Osborne <richard@xmos.com>
Mon, 17 Dec 2012 13:50:04 +0000 (13:50 +0000)
commit35150cbf4166ae8d69032d355f1e8d83b4a6eb3c
treec2e54c7213d750760d601f6d230c784464d05993
parent7f7d201d737ecb354abd683d63ab8abbf83158c3
Add instruction encodings / disassembly support for rus instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170330 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
lib/Target/XCore/XCoreInstrFormats.td
lib/Target/XCore/XCoreInstrInfo.td
test/MC/Disassembler/XCore/xcore.txt