[mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes.

[mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes.

Summary:
Without these patterns we would generate a complete LL/SC sequence.
This would be problematic for memory regions marked as WRITE-only or
READ-only, as the instructions LL/SC would read/write to the protected
memory regions correspondingly.

Reviewers: dsanders

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D14397

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252293 91177308-0d34-0410-b5e6-96231b3b80d8