x86/mce/amd: Introduce deferred error interrupt handler
authorAravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Wed, 6 May 2015 11:58:56 +0000 (06:58 -0500)
committerBorislav Petkov <bp@suse.de>
Thu, 7 May 2015 08:23:32 +0000 (10:23 +0200)
commit24fd78a81f6d3fe7f7a440c8629f9c52cd5f830e
tree9c32cc0f0aa92425ebf780a9d93e3517b2f36ea7
parent7559e13fb4abe7880dfaf985d6a1630ca90a67ce
x86/mce/amd: Introduce deferred error interrupt handler

Deferred errors indicate error conditions that were not corrected, but
require no action from S/W (or action is optional).These errors provide
info about a latent UC MCE that can occur when a poisoned data is
consumed by the processor.

Processors that report these errors can be configured to generate APIC
interrupts to notify OS about the error.

Provide an interrupt handler in this patch so that OS can catch these
errors as and when they happen. Currently, we simply log the errors and
exit the handler as S/W action is not mandated.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1430913538-1415-5-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
12 files changed:
arch/x86/include/asm/entry_arch.h
arch/x86/include/asm/hardirq.h
arch/x86/include/asm/hw_irq.h
arch/x86/include/asm/irq_vectors.h
arch/x86/include/asm/mce.h
arch/x86/include/asm/trace/irq_vectors.h
arch/x86/include/asm/traps.h
arch/x86/kernel/cpu/mcheck/mce_amd.c
arch/x86/kernel/entry_64.S
arch/x86/kernel/irq.c
arch/x86/kernel/irqinit.c
arch/x86/kernel/traps.c