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ARM: Use "dmb sy" for barriers on M-class CPUs
authorTim Northover <tnorthover@apple.com>
Wed, 28 Aug 2013 14:39:19 +0000 (14:39 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 28 Aug 2013 14:39:19 +0000 (14:39 +0000)
commit22266c1d4817fc30355a90bb264ede08482bba3a
treea45dbfb4e64a237b8382aef5f2872d7c4ed4e882tree | snapshot
parentbafb5f8d9f415340d9035ee9430f9480da9a50fbcommit | diff
ARM: Use "dmb sy" for barriers on M-class CPUs

The usual default of "dmb ish" (inner-shareable) isn't even a valid instruction
on v6M or v7M (well, it does the same thing but software is strongly
discouraged from using it) so we should emit a full-system barrier there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189483 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp diff | blob | history
test/CodeGen/Thumb/barrier.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors