ARM: don't expand atomicrmw inline on Cortex-M0
authorTim Northover <tnorthover@apple.com>
Fri, 25 Oct 2013 09:30:24 +0000 (09:30 +0000)
committerTim Northover <tnorthover@apple.com>
Fri, 25 Oct 2013 09:30:24 +0000 (09:30 +0000)
commit214c37d1816b62a25525282817f7088a1e2ed1dc
tree86ca829469e85c4e457480afd50f0cc8de3bdcba
parent5a42ae81f742aaab826b7a72cb0a9a7e5a957a07
ARM: don't expand atomicrmw inline on Cortex-M0

There's a barrier instruction so that should still be used, but most actual
atomic operations are going to need a platform decision on the correct
behaviour (either nop if single-threaded or OS-support otherwise).

rdar://problem/15287210

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193399 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMSubtarget.h
test/CodeGen/ARM/atomic-op.ll